The Fetch-Execute Cycle Explained (OCR GCSE)

Breaking It Down

1. Fetch: The CPU uses the Program Counter (PC) to locate the next instruction’s memory address, loads it into the Memory Address Register (MAR), and fetches the instruction into the Memory Data Register (MDR).
2. Decode: The Control Unit decodes the instruction in the Current Instruction Register (CIR), figuring out what action to take.
3. Execute: The CPU executes the instruction—think calculations or data transfers—and updates the PC to point to the next instruction.

Key Players in the Cycle

• Program Counter (PC): Points to the next instruction’s address.
• Memory Address Register (MAR): Stores the address of the instruction to fetch.
• Memory Data Register (MDR): Holds the fetched instruction or data.
• Current Instruction Register (CIR): Keeps the instruction being decoded or executed.

Model Answer Structure

Click to Reveal

• Introduction: Describe the fetch-execute cycle as the CPU’s core process for handling instructions.
• Fetch Stage: Explain how the PC provides the address to the MAR, fetches the instruction into the MDR, and moves it to the CIR.
• Decode Stage: Highlight the Control Unit’s role in decoding the instruction in the CIR.
• Execute Stage: Detail the execution process (e.g., performing an addition) and PC increment.
• Conclusion: Note the cycle’s continuous nature, repeating for each instruction.

Interactive Simulator

Bring the fetch-execute cycle to life with our interactive simulator—see each step in action!

Launch Simulator

What to Remember

• Break down the fetch, decode, and execute stages clearly.
• Always mention PC, MAR, MDR, and CIR for full marks.
• Use diagrams or examples to make your answers stand out.